fix: enclose rounded preferred timings in EDID ranges

patches/qemu-virtio-refresh-rate.patch

@@ -33,13 +33,13 @@
      for (output_idx = 0, node = g->conf.outputs;
 --- a/hw/display/edid-generate.c
 +++ b/hw/display/edid-generate.c
-@@ -220,17 +220,17 @@
+@@ -220,17 +220,20 @@
      desc[5 + len] = '\n';
  }
  
 -static void edid_desc_ranges(uint8_t *desc)
-+static void edid_desc_ranges(uint8_t *desc, uint32_t refresh_rate,
-+                             uint32_t horizontal_rate)
++static void edid_desc_ranges(uint8_t *desc, uint64_t clock,
++                             uint32_t htotal, uint32_t vtotal)
  {
      edid_desc_type(desc, 0xfd);
  
@@ -50,22 +50,25 @@
 -    /* horizontal (30 -> 160 kHz) */
 -    desc[7] =  30;
 -    desc[8] = 160;
-+    /* Preserve the legacy ranges and include the preferred mode. */
-+    desc[5] = 50;
-+    desc[6] = MIN(255, MAX(125, DIV_ROUND_UP(refresh_rate, 1000)));
++    /* Enclose the encoded timing after its 10 kHz pixel-clock rounding,
++     * while retaining legacy ranges whenever they already contain it. */
++    uint64_t vperiod = (uint64_t)htotal * vtotal;
++    uint64_t hperiod = (uint64_t)htotal * 1000;
++    desc[5] = MIN(50, clock / vperiod);
++    desc[6] = MIN(255, MAX(125, DIV_ROUND_UP(clock, vperiod)));
 +
-+    desc[7] = 30;
-+    desc[8] = MIN(255, MAX(160, DIV_ROUND_UP(horizontal_rate, 1000)));
++    desc[7] = MIN(30, clock / hperiod);
++    desc[8] = MIN(255, MAX(160, DIV_ROUND_UP(clock, hperiod)));
  
      /* max dot clock (2550 MHz) */
      desc[9] = 2550 / 10;
-@@ -513,7 +513,8 @@
+@@ -513,7 +516,8 @@
       * so dta descriptor offsets don't move any more.
       */
  
 -    edid_desc_ranges(desc);
-+    edid_desc_ranges(desc, refresh_rate,
-+                     timings.clock * 10000 / (info->prefx + timings.xblank));
++    edid_desc_ranges(desc, (uint64_t)timings.clock * 10000,
++                     info->prefx + timings.xblank, info->prefy + timings.yblank);
      desc = edid_desc_next(edid, dta, desc);
  
      if (desc && info->name) {